2013-12-21 07:47:16 +08:00
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#include "test/jemalloc_test.h"
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2017-01-16 08:56:30 +08:00
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TEST_BEGIN(test_stats_summary) {
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2015-05-29 06:03:58 +08:00
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size_t sz, allocated, active, resident, mapped;
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2013-12-21 07:47:16 +08:00
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int expected = config_stats ? 0 : ENOENT;
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sz = sizeof(size_t);
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2016-10-28 12:31:25 +08:00
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assert_d_eq(mallctl("stats.allocated", (void *)&allocated, &sz, NULL,
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0), expected, "Unexpected mallctl() result");
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assert_d_eq(mallctl("stats.active", (void *)&active, &sz, NULL, 0),
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2013-12-21 07:47:16 +08:00
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expected, "Unexpected mallctl() result");
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2016-10-28 12:31:25 +08:00
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assert_d_eq(mallctl("stats.resident", (void *)&resident, &sz, NULL, 0),
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expected, "Unexpected mallctl() result");
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assert_d_eq(mallctl("stats.mapped", (void *)&mapped, &sz, NULL, 0),
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2015-05-29 06:03:58 +08:00
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expected, "Unexpected mallctl() result");
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2013-12-21 07:47:16 +08:00
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if (config_stats) {
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assert_zu_le(allocated, active,
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"allocated should be no larger than active");
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2015-05-29 06:03:58 +08:00
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assert_zu_lt(active, resident,
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"active should be less than resident");
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assert_zu_lt(active, mapped,
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"active should be less than mapped");
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2013-12-21 07:47:16 +08:00
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}
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}
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TEST_END
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2017-01-16 08:56:30 +08:00
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TEST_BEGIN(test_stats_large) {
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2013-12-21 07:47:16 +08:00
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void *p;
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uint64_t epoch;
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size_t allocated;
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2014-05-16 13:22:27 +08:00
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uint64_t nmalloc, ndalloc, nrequests;
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2013-12-21 07:47:16 +08:00
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size_t sz;
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int expected = config_stats ? 0 : ENOENT;
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Implement per-CPU arena.
The new feature, opt.percpu_arena, determines thread-arena association
dynamically based CPU id. Three modes are supported: "percpu", "phycpu"
and disabled.
"percpu" uses the current core id (with help from sched_getcpu())
directly as the arena index, while "phycpu" will assign threads on the
same physical CPU to the same arena. In other words, "percpu" means # of
arenas == # of CPUs, while "phycpu" has # of arenas == 1/2 * (# of
CPUs). Note that no runtime check on whether hyper threading is enabled
is added yet.
When enabled, threads will be migrated between arenas when a CPU change
is detected. In the current design, to reduce overhead from reading CPU
id, each arena tracks the thread accessed most recently. When a new
thread comes in, we will read CPU id and update arena if necessary.
2017-02-03 09:02:05 +08:00
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p = mallocx(SMALL_MAXCLASS+1, MALLOCX_ARENA(0));
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2013-12-21 07:47:16 +08:00
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assert_ptr_not_null(p, "Unexpected mallocx() failure");
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2016-10-28 12:31:25 +08:00
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assert_d_eq(mallctl("epoch", NULL, NULL, (void *)&epoch, sizeof(epoch)),
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0, "Unexpected mallctl() failure");
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2013-12-21 07:47:16 +08:00
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sz = sizeof(size_t);
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2016-10-28 12:31:25 +08:00
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assert_d_eq(mallctl("stats.arenas.0.large.allocated",
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(void *)&allocated, &sz, NULL, 0), expected,
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"Unexpected mallctl() result");
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2013-12-21 07:47:16 +08:00
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sz = sizeof(uint64_t);
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2016-10-28 12:31:25 +08:00
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assert_d_eq(mallctl("stats.arenas.0.large.nmalloc", (void *)&nmalloc,
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&sz, NULL, 0), expected, "Unexpected mallctl() result");
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assert_d_eq(mallctl("stats.arenas.0.large.ndalloc", (void *)&ndalloc,
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&sz, NULL, 0), expected, "Unexpected mallctl() result");
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assert_d_eq(mallctl("stats.arenas.0.large.nrequests",
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(void *)&nrequests, &sz, NULL, 0), expected,
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"Unexpected mallctl() result");
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2013-12-21 07:47:16 +08:00
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if (config_stats) {
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assert_zu_gt(allocated, 0,
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"allocated should be greater than zero");
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assert_u64_ge(nmalloc, ndalloc,
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"nmalloc should be at least as large as ndalloc");
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2014-05-16 13:22:27 +08:00
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assert_u64_le(nmalloc, nrequests,
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"nmalloc should no larger than nrequests");
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2013-12-21 07:47:16 +08:00
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}
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dallocx(p, 0);
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}
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TEST_END
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2017-01-16 08:56:30 +08:00
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TEST_BEGIN(test_stats_arenas_summary) {
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2016-06-01 05:50:21 +08:00
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void *little, *large;
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2013-12-21 07:47:16 +08:00
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uint64_t epoch;
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size_t sz;
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int expected = config_stats ? 0 : ENOENT;
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size_t mapped;
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Implement two-phase decay-based purging.
Split decay-based purging into two phases, the first of which uses lazy
purging to convert dirty pages to "muzzy", and the second of which uses
forced purging, decommit, or unmapping to convert pages to clean or
destroy them altogether. Not all operating systems support lazy
purging, yet the application may provide extent hooks that implement
lazy purging, so care must be taken to dynamically omit the first phase
when necessary.
The mallctl interfaces change as follows:
- opt.decay_time --> opt.{dirty,muzzy}_decay_time
- arena.<i>.decay_time --> arena.<i>.{dirty,muzzy}_decay_time
- arenas.decay_time --> arenas.{dirty,muzzy}_decay_time
- stats.arenas.<i>.pdirty --> stats.arenas.<i>.p{dirty,muzzy}
- stats.arenas.<i>.{npurge,nmadvise,purged} -->
stats.arenas.<i>.{dirty,muzzy}_{npurge,nmadvise,purged}
This resolves #521.
2017-03-09 14:42:57 +08:00
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uint64_t dirty_npurge, dirty_nmadvise, dirty_purged;
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uint64_t muzzy_npurge, muzzy_nmadvise, muzzy_purged;
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2013-12-21 07:47:16 +08:00
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Implement per-CPU arena.
The new feature, opt.percpu_arena, determines thread-arena association
dynamically based CPU id. Three modes are supported: "percpu", "phycpu"
and disabled.
"percpu" uses the current core id (with help from sched_getcpu())
directly as the arena index, while "phycpu" will assign threads on the
same physical CPU to the same arena. In other words, "percpu" means # of
arenas == # of CPUs, while "phycpu" has # of arenas == 1/2 * (# of
CPUs). Note that no runtime check on whether hyper threading is enabled
is added yet.
When enabled, threads will be migrated between arenas when a CPU change
is detected. In the current design, to reduce overhead from reading CPU
id, each arena tracks the thread accessed most recently. When a new
thread comes in, we will read CPU id and update arena if necessary.
2017-02-03 09:02:05 +08:00
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little = mallocx(SMALL_MAXCLASS, MALLOCX_ARENA(0));
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2014-05-21 17:01:21 +08:00
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assert_ptr_not_null(little, "Unexpected mallocx() failure");
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Implement per-CPU arena.
The new feature, opt.percpu_arena, determines thread-arena association
dynamically based CPU id. Three modes are supported: "percpu", "phycpu"
and disabled.
"percpu" uses the current core id (with help from sched_getcpu())
directly as the arena index, while "phycpu" will assign threads on the
same physical CPU to the same arena. In other words, "percpu" means # of
arenas == # of CPUs, while "phycpu" has # of arenas == 1/2 * (# of
CPUs). Note that no runtime check on whether hyper threading is enabled
is added yet.
When enabled, threads will be migrated between arenas when a CPU change
is detected. In the current design, to reduce overhead from reading CPU
id, each arena tracks the thread accessed most recently. When a new
thread comes in, we will read CPU id and update arena if necessary.
2017-02-03 09:02:05 +08:00
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large = mallocx((1U << LG_LARGE_MINCLASS), MALLOCX_ARENA(0));
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2016-06-01 05:50:21 +08:00
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assert_ptr_not_null(large, "Unexpected mallocx() failure");
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2013-12-21 07:47:16 +08:00
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2016-02-20 10:24:30 +08:00
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dallocx(little, 0);
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2016-06-01 05:50:21 +08:00
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dallocx(large, 0);
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2016-02-20 10:24:30 +08:00
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2016-10-13 02:49:19 +08:00
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assert_d_eq(mallctl("thread.tcache.flush", NULL, NULL, NULL, 0),
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config_tcache ? 0 : ENOENT, "Unexpected mallctl() result");
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2013-12-21 07:47:16 +08:00
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assert_d_eq(mallctl("arena.0.purge", NULL, NULL, NULL, 0), 0,
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"Unexpected mallctl() failure");
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2016-10-28 12:31:25 +08:00
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assert_d_eq(mallctl("epoch", NULL, NULL, (void *)&epoch, sizeof(epoch)),
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0, "Unexpected mallctl() failure");
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2013-12-21 07:47:16 +08:00
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sz = sizeof(size_t);
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2016-10-28 12:31:25 +08:00
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assert_d_eq(mallctl("stats.arenas.0.mapped", (void *)&mapped, &sz, NULL,
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0), expected, "Unexepected mallctl() result");
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Implement two-phase decay-based purging.
Split decay-based purging into two phases, the first of which uses lazy
purging to convert dirty pages to "muzzy", and the second of which uses
forced purging, decommit, or unmapping to convert pages to clean or
destroy them altogether. Not all operating systems support lazy
purging, yet the application may provide extent hooks that implement
lazy purging, so care must be taken to dynamically omit the first phase
when necessary.
The mallctl interfaces change as follows:
- opt.decay_time --> opt.{dirty,muzzy}_decay_time
- arena.<i>.decay_time --> arena.<i>.{dirty,muzzy}_decay_time
- arenas.decay_time --> arenas.{dirty,muzzy}_decay_time
- stats.arenas.<i>.pdirty --> stats.arenas.<i>.p{dirty,muzzy}
- stats.arenas.<i>.{npurge,nmadvise,purged} -->
stats.arenas.<i>.{dirty,muzzy}_{npurge,nmadvise,purged}
This resolves #521.
2017-03-09 14:42:57 +08:00
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2013-12-21 07:47:16 +08:00
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sz = sizeof(uint64_t);
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Implement two-phase decay-based purging.
Split decay-based purging into two phases, the first of which uses lazy
purging to convert dirty pages to "muzzy", and the second of which uses
forced purging, decommit, or unmapping to convert pages to clean or
destroy them altogether. Not all operating systems support lazy
purging, yet the application may provide extent hooks that implement
lazy purging, so care must be taken to dynamically omit the first phase
when necessary.
The mallctl interfaces change as follows:
- opt.decay_time --> opt.{dirty,muzzy}_decay_time
- arena.<i>.decay_time --> arena.<i>.{dirty,muzzy}_decay_time
- arenas.decay_time --> arenas.{dirty,muzzy}_decay_time
- stats.arenas.<i>.pdirty --> stats.arenas.<i>.p{dirty,muzzy}
- stats.arenas.<i>.{npurge,nmadvise,purged} -->
stats.arenas.<i>.{dirty,muzzy}_{npurge,nmadvise,purged}
This resolves #521.
2017-03-09 14:42:57 +08:00
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assert_d_eq(mallctl("stats.arenas.0.dirty_npurge",
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(void *)&dirty_npurge, &sz, NULL, 0), expected,
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"Unexepected mallctl() result");
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assert_d_eq(mallctl("stats.arenas.0.dirty_nmadvise",
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(void *)&dirty_nmadvise, &sz, NULL, 0), expected,
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"Unexepected mallctl() result");
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assert_d_eq(mallctl("stats.arenas.0.dirty_purged",
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(void *)&dirty_purged, &sz, NULL, 0), expected,
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"Unexepected mallctl() result");
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assert_d_eq(mallctl("stats.arenas.0.muzzy_npurge",
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(void *)&muzzy_npurge, &sz, NULL, 0), expected,
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"Unexepected mallctl() result");
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assert_d_eq(mallctl("stats.arenas.0.muzzy_nmadvise",
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(void *)&muzzy_nmadvise, &sz, NULL, 0), expected,
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"Unexepected mallctl() result");
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assert_d_eq(mallctl("stats.arenas.0.muzzy_purged",
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(void *)&muzzy_purged, &sz, NULL, 0), expected,
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"Unexepected mallctl() result");
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2013-12-21 07:47:16 +08:00
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if (config_stats) {
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Implement two-phase decay-based purging.
Split decay-based purging into two phases, the first of which uses lazy
purging to convert dirty pages to "muzzy", and the second of which uses
forced purging, decommit, or unmapping to convert pages to clean or
destroy them altogether. Not all operating systems support lazy
purging, yet the application may provide extent hooks that implement
lazy purging, so care must be taken to dynamically omit the first phase
when necessary.
The mallctl interfaces change as follows:
- opt.decay_time --> opt.{dirty,muzzy}_decay_time
- arena.<i>.decay_time --> arena.<i>.{dirty,muzzy}_decay_time
- arenas.decay_time --> arenas.{dirty,muzzy}_decay_time
- stats.arenas.<i>.pdirty --> stats.arenas.<i>.p{dirty,muzzy}
- stats.arenas.<i>.{npurge,nmadvise,purged} -->
stats.arenas.<i>.{dirty,muzzy}_{npurge,nmadvise,purged}
This resolves #521.
2017-03-09 14:42:57 +08:00
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assert_u64_gt(dirty_npurge + muzzy_npurge, 0,
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2014-01-22 06:20:29 +08:00
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"At least one purge should have occurred");
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Implement two-phase decay-based purging.
Split decay-based purging into two phases, the first of which uses lazy
purging to convert dirty pages to "muzzy", and the second of which uses
forced purging, decommit, or unmapping to convert pages to clean or
destroy them altogether. Not all operating systems support lazy
purging, yet the application may provide extent hooks that implement
lazy purging, so care must be taken to dynamically omit the first phase
when necessary.
The mallctl interfaces change as follows:
- opt.decay_time --> opt.{dirty,muzzy}_decay_time
- arena.<i>.decay_time --> arena.<i>.{dirty,muzzy}_decay_time
- arenas.decay_time --> arenas.{dirty,muzzy}_decay_time
- stats.arenas.<i>.pdirty --> stats.arenas.<i>.p{dirty,muzzy}
- stats.arenas.<i>.{npurge,nmadvise,purged} -->
stats.arenas.<i>.{dirty,muzzy}_{npurge,nmadvise,purged}
This resolves #521.
2017-03-09 14:42:57 +08:00
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assert_u64_le(dirty_nmadvise, dirty_purged,
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"dirty_nmadvise should be no greater than dirty_purged");
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assert_u64_le(muzzy_nmadvise, muzzy_purged,
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"muzzy_nmadvise should be no greater than muzzy_purged");
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2013-12-21 07:47:16 +08:00
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}
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}
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TEST_END
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2014-01-22 06:20:29 +08:00
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void *
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2017-01-16 08:56:30 +08:00
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thd_start(void *arg) {
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2017-01-20 10:15:45 +08:00
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return NULL;
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2014-01-22 06:20:29 +08:00
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}
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static void
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2017-01-16 08:56:30 +08:00
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no_lazy_lock(void) {
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2014-01-22 06:20:29 +08:00
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thd_t thd;
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thd_create(&thd, thd_start, NULL);
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thd_join(thd, NULL);
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}
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2017-01-16 08:56:30 +08:00
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TEST_BEGIN(test_stats_arenas_small) {
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2013-12-21 07:47:16 +08:00
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void *p;
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size_t sz, allocated;
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uint64_t epoch, nmalloc, ndalloc, nrequests;
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int expected = config_stats ? 0 : ENOENT;
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2014-01-22 06:20:29 +08:00
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no_lazy_lock(); /* Lazy locking would dodge tcache testing. */
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Implement per-CPU arena.
The new feature, opt.percpu_arena, determines thread-arena association
dynamically based CPU id. Three modes are supported: "percpu", "phycpu"
and disabled.
"percpu" uses the current core id (with help from sched_getcpu())
directly as the arena index, while "phycpu" will assign threads on the
same physical CPU to the same arena. In other words, "percpu" means # of
arenas == # of CPUs, while "phycpu" has # of arenas == 1/2 * (# of
CPUs). Note that no runtime check on whether hyper threading is enabled
is added yet.
When enabled, threads will be migrated between arenas when a CPU change
is detected. In the current design, to reduce overhead from reading CPU
id, each arena tracks the thread accessed most recently. When a new
thread comes in, we will read CPU id and update arena if necessary.
2017-02-03 09:02:05 +08:00
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p = mallocx(SMALL_MAXCLASS, MALLOCX_ARENA(0));
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2013-12-21 07:47:16 +08:00
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assert_ptr_not_null(p, "Unexpected mallocx() failure");
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2014-01-15 09:49:37 +08:00
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assert_d_eq(mallctl("thread.tcache.flush", NULL, NULL, NULL, 0),
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config_tcache ? 0 : ENOENT, "Unexpected mallctl() result");
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2016-10-28 12:31:25 +08:00
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assert_d_eq(mallctl("epoch", NULL, NULL, (void *)&epoch, sizeof(epoch)),
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0, "Unexpected mallctl() failure");
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2013-12-21 07:47:16 +08:00
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sz = sizeof(size_t);
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2016-10-28 12:31:25 +08:00
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assert_d_eq(mallctl("stats.arenas.0.small.allocated",
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(void *)&allocated, &sz, NULL, 0), expected,
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"Unexpected mallctl() result");
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2013-12-21 07:47:16 +08:00
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sz = sizeof(uint64_t);
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2016-10-28 12:31:25 +08:00
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assert_d_eq(mallctl("stats.arenas.0.small.nmalloc", (void *)&nmalloc,
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&sz, NULL, 0), expected, "Unexpected mallctl() result");
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assert_d_eq(mallctl("stats.arenas.0.small.ndalloc", (void *)&ndalloc,
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&sz, NULL, 0), expected, "Unexpected mallctl() result");
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assert_d_eq(mallctl("stats.arenas.0.small.nrequests",
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(void *)&nrequests, &sz, NULL, 0), expected,
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"Unexpected mallctl() result");
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2013-12-21 07:47:16 +08:00
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if (config_stats) {
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assert_zu_gt(allocated, 0,
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2014-01-15 09:49:37 +08:00
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"allocated should be greater than zero");
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2013-12-21 07:47:16 +08:00
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assert_u64_gt(nmalloc, 0,
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|
|
|
|
"nmalloc should be no greater than zero");
|
|
|
|
|
assert_u64_ge(nmalloc, ndalloc,
|
|
|
|
|
"nmalloc should be at least as large as ndalloc");
|
|
|
|
|
assert_u64_gt(nrequests, 0,
|
2014-01-15 09:49:37 +08:00
|
|
|
"nrequests should be greater than zero");
|
2013-12-21 07:47:16 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
dallocx(p, 0);
|
|
|
|
|
}
|
|
|
|
|
TEST_END
|
|
|
|
|
|
2017-01-16 08:56:30 +08:00
|
|
|
TEST_BEGIN(test_stats_arenas_large) {
|
2014-10-13 13:53:59 +08:00
|
|
|
void *p;
|
|
|
|
|
size_t sz, allocated;
|
|
|
|
|
uint64_t epoch, nmalloc, ndalloc;
|
|
|
|
|
int expected = config_stats ? 0 : ENOENT;
|
|
|
|
|
|
Implement per-CPU arena.
The new feature, opt.percpu_arena, determines thread-arena association
dynamically based CPU id. Three modes are supported: "percpu", "phycpu"
and disabled.
"percpu" uses the current core id (with help from sched_getcpu())
directly as the arena index, while "phycpu" will assign threads on the
same physical CPU to the same arena. In other words, "percpu" means # of
arenas == # of CPUs, while "phycpu" has # of arenas == 1/2 * (# of
CPUs). Note that no runtime check on whether hyper threading is enabled
is added yet.
When enabled, threads will be migrated between arenas when a CPU change
is detected. In the current design, to reduce overhead from reading CPU
id, each arena tracks the thread accessed most recently. When a new
thread comes in, we will read CPU id and update arena if necessary.
2017-02-03 09:02:05 +08:00
|
|
|
p = mallocx((1U << LG_LARGE_MINCLASS), MALLOCX_ARENA(0));
|
2014-10-13 13:53:59 +08:00
|
|
|
assert_ptr_not_null(p, "Unexpected mallocx() failure");
|
|
|
|
|
|
2016-10-28 12:31:25 +08:00
|
|
|
assert_d_eq(mallctl("epoch", NULL, NULL, (void *)&epoch, sizeof(epoch)),
|
|
|
|
|
0, "Unexpected mallctl() failure");
|
2014-10-13 13:53:59 +08:00
|
|
|
|
|
|
|
|
sz = sizeof(size_t);
|
2016-10-28 12:31:25 +08:00
|
|
|
assert_d_eq(mallctl("stats.arenas.0.large.allocated",
|
|
|
|
|
(void *)&allocated, &sz, NULL, 0), expected,
|
|
|
|
|
"Unexpected mallctl() result");
|
2014-10-13 13:53:59 +08:00
|
|
|
sz = sizeof(uint64_t);
|
2016-10-28 12:31:25 +08:00
|
|
|
assert_d_eq(mallctl("stats.arenas.0.large.nmalloc", (void *)&nmalloc,
|
|
|
|
|
&sz, NULL, 0), expected, "Unexpected mallctl() result");
|
|
|
|
|
assert_d_eq(mallctl("stats.arenas.0.large.ndalloc", (void *)&ndalloc,
|
|
|
|
|
&sz, NULL, 0), expected, "Unexpected mallctl() result");
|
2014-10-13 13:53:59 +08:00
|
|
|
|
|
|
|
|
if (config_stats) {
|
|
|
|
|
assert_zu_gt(allocated, 0,
|
|
|
|
|
"allocated should be greater than zero");
|
2016-04-13 03:39:02 +08:00
|
|
|
assert_u64_gt(nmalloc, 0,
|
2014-10-13 13:53:59 +08:00
|
|
|
"nmalloc should be greater than zero");
|
2016-04-13 03:39:02 +08:00
|
|
|
assert_u64_ge(nmalloc, ndalloc,
|
2014-10-13 13:53:59 +08:00
|
|
|
"nmalloc should be at least as large as ndalloc");
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
dallocx(p, 0);
|
|
|
|
|
}
|
|
|
|
|
TEST_END
|
|
|
|
|
|
Implement per-CPU arena.
The new feature, opt.percpu_arena, determines thread-arena association
dynamically based CPU id. Three modes are supported: "percpu", "phycpu"
and disabled.
"percpu" uses the current core id (with help from sched_getcpu())
directly as the arena index, while "phycpu" will assign threads on the
same physical CPU to the same arena. In other words, "percpu" means # of
arenas == # of CPUs, while "phycpu" has # of arenas == 1/2 * (# of
CPUs). Note that no runtime check on whether hyper threading is enabled
is added yet.
When enabled, threads will be migrated between arenas when a CPU change
is detected. In the current design, to reduce overhead from reading CPU
id, each arena tracks the thread accessed most recently. When a new
thread comes in, we will read CPU id and update arena if necessary.
2017-02-03 09:02:05 +08:00
|
|
|
static void
|
|
|
|
|
gen_mallctl_str(char *cmd, char *name, unsigned arena_ind) {
|
|
|
|
|
sprintf(cmd, "stats.arenas.%u.bins.0.%s", arena_ind, name);
|
|
|
|
|
}
|
|
|
|
|
|
2017-01-16 08:56:30 +08:00
|
|
|
TEST_BEGIN(test_stats_arenas_bins) {
|
2013-12-21 07:47:16 +08:00
|
|
|
void *p;
|
2016-05-30 09:34:50 +08:00
|
|
|
size_t sz, curslabs, curregs;
|
2013-12-21 07:47:16 +08:00
|
|
|
uint64_t epoch, nmalloc, ndalloc, nrequests, nfills, nflushes;
|
2016-05-30 09:34:50 +08:00
|
|
|
uint64_t nslabs, nreslabs;
|
2013-12-21 07:47:16 +08:00
|
|
|
int expected = config_stats ? 0 : ENOENT;
|
|
|
|
|
|
Implement per-CPU arena.
The new feature, opt.percpu_arena, determines thread-arena association
dynamically based CPU id. Three modes are supported: "percpu", "phycpu"
and disabled.
"percpu" uses the current core id (with help from sched_getcpu())
directly as the arena index, while "phycpu" will assign threads on the
same physical CPU to the same arena. In other words, "percpu" means # of
arenas == # of CPUs, while "phycpu" has # of arenas == 1/2 * (# of
CPUs). Note that no runtime check on whether hyper threading is enabled
is added yet.
When enabled, threads will be migrated between arenas when a CPU change
is detected. In the current design, to reduce overhead from reading CPU
id, each arena tracks the thread accessed most recently. When a new
thread comes in, we will read CPU id and update arena if necessary.
2017-02-03 09:02:05 +08:00
|
|
|
unsigned arena_ind, old_arena_ind;
|
|
|
|
|
sz = sizeof(unsigned);
|
|
|
|
|
assert_d_eq(mallctl("arenas.create", (void *)&arena_ind, &sz, NULL, 0),
|
|
|
|
|
0, "Arena creation failure");
|
|
|
|
|
sz = sizeof(arena_ind);
|
|
|
|
|
assert_d_eq(mallctl("thread.arena", (void *)&old_arena_ind, &sz,
|
|
|
|
|
(void *)&arena_ind, sizeof(arena_ind)), 0,
|
|
|
|
|
"Unexpected mallctl() failure");
|
2013-12-21 07:47:16 +08:00
|
|
|
|
Implement per-CPU arena.
The new feature, opt.percpu_arena, determines thread-arena association
dynamically based CPU id. Three modes are supported: "percpu", "phycpu"
and disabled.
"percpu" uses the current core id (with help from sched_getcpu())
directly as the arena index, while "phycpu" will assign threads on the
same physical CPU to the same arena. In other words, "percpu" means # of
arenas == # of CPUs, while "phycpu" has # of arenas == 1/2 * (# of
CPUs). Note that no runtime check on whether hyper threading is enabled
is added yet.
When enabled, threads will be migrated between arenas when a CPU change
is detected. In the current design, to reduce overhead from reading CPU
id, each arena tracks the thread accessed most recently. When a new
thread comes in, we will read CPU id and update arena if necessary.
2017-02-03 09:02:05 +08:00
|
|
|
p = malloc(arena_bin_info[0].reg_size);
|
|
|
|
|
assert_ptr_not_null(p, "Unexpected malloc() failure");
|
2013-12-21 07:47:16 +08:00
|
|
|
|
|
|
|
|
assert_d_eq(mallctl("thread.tcache.flush", NULL, NULL, NULL, 0),
|
|
|
|
|
config_tcache ? 0 : ENOENT, "Unexpected mallctl() result");
|
|
|
|
|
|
2016-10-28 12:31:25 +08:00
|
|
|
assert_d_eq(mallctl("epoch", NULL, NULL, (void *)&epoch, sizeof(epoch)),
|
|
|
|
|
0, "Unexpected mallctl() failure");
|
2013-12-21 07:47:16 +08:00
|
|
|
|
Implement per-CPU arena.
The new feature, opt.percpu_arena, determines thread-arena association
dynamically based CPU id. Three modes are supported: "percpu", "phycpu"
and disabled.
"percpu" uses the current core id (with help from sched_getcpu())
directly as the arena index, while "phycpu" will assign threads on the
same physical CPU to the same arena. In other words, "percpu" means # of
arenas == # of CPUs, while "phycpu" has # of arenas == 1/2 * (# of
CPUs). Note that no runtime check on whether hyper threading is enabled
is added yet.
When enabled, threads will be migrated between arenas when a CPU change
is detected. In the current design, to reduce overhead from reading CPU
id, each arena tracks the thread accessed most recently. When a new
thread comes in, we will read CPU id and update arena if necessary.
2017-02-03 09:02:05 +08:00
|
|
|
char cmd[128];
|
2013-12-21 07:47:16 +08:00
|
|
|
sz = sizeof(uint64_t);
|
Implement per-CPU arena.
The new feature, opt.percpu_arena, determines thread-arena association
dynamically based CPU id. Three modes are supported: "percpu", "phycpu"
and disabled.
"percpu" uses the current core id (with help from sched_getcpu())
directly as the arena index, while "phycpu" will assign threads on the
same physical CPU to the same arena. In other words, "percpu" means # of
arenas == # of CPUs, while "phycpu" has # of arenas == 1/2 * (# of
CPUs). Note that no runtime check on whether hyper threading is enabled
is added yet.
When enabled, threads will be migrated between arenas when a CPU change
is detected. In the current design, to reduce overhead from reading CPU
id, each arena tracks the thread accessed most recently. When a new
thread comes in, we will read CPU id and update arena if necessary.
2017-02-03 09:02:05 +08:00
|
|
|
gen_mallctl_str(cmd, "nmalloc", arena_ind);
|
|
|
|
|
assert_d_eq(mallctl(cmd, (void *)&nmalloc, &sz, NULL, 0), expected,
|
|
|
|
|
"Unexpected mallctl() result");
|
|
|
|
|
gen_mallctl_str(cmd, "ndalloc", arena_ind);
|
|
|
|
|
assert_d_eq(mallctl(cmd, (void *)&ndalloc, &sz, NULL, 0), expected,
|
|
|
|
|
"Unexpected mallctl() result");
|
|
|
|
|
gen_mallctl_str(cmd, "nrequests", arena_ind);
|
|
|
|
|
assert_d_eq(mallctl(cmd, (void *)&nrequests, &sz, NULL, 0), expected,
|
2016-10-28 12:31:25 +08:00
|
|
|
"Unexpected mallctl() result");
|
2014-10-13 13:53:59 +08:00
|
|
|
sz = sizeof(size_t);
|
Implement per-CPU arena.
The new feature, opt.percpu_arena, determines thread-arena association
dynamically based CPU id. Three modes are supported: "percpu", "phycpu"
and disabled.
"percpu" uses the current core id (with help from sched_getcpu())
directly as the arena index, while "phycpu" will assign threads on the
same physical CPU to the same arena. In other words, "percpu" means # of
arenas == # of CPUs, while "phycpu" has # of arenas == 1/2 * (# of
CPUs). Note that no runtime check on whether hyper threading is enabled
is added yet.
When enabled, threads will be migrated between arenas when a CPU change
is detected. In the current design, to reduce overhead from reading CPU
id, each arena tracks the thread accessed most recently. When a new
thread comes in, we will read CPU id and update arena if necessary.
2017-02-03 09:02:05 +08:00
|
|
|
gen_mallctl_str(cmd, "curregs", arena_ind);
|
|
|
|
|
assert_d_eq(mallctl(cmd, (void *)&curregs, &sz, NULL, 0), expected,
|
|
|
|
|
"Unexpected mallctl() result");
|
2013-12-21 07:47:16 +08:00
|
|
|
|
2014-12-03 08:24:11 +08:00
|
|
|
sz = sizeof(uint64_t);
|
Implement per-CPU arena.
The new feature, opt.percpu_arena, determines thread-arena association
dynamically based CPU id. Three modes are supported: "percpu", "phycpu"
and disabled.
"percpu" uses the current core id (with help from sched_getcpu())
directly as the arena index, while "phycpu" will assign threads on the
same physical CPU to the same arena. In other words, "percpu" means # of
arenas == # of CPUs, while "phycpu" has # of arenas == 1/2 * (# of
CPUs). Note that no runtime check on whether hyper threading is enabled
is added yet.
When enabled, threads will be migrated between arenas when a CPU change
is detected. In the current design, to reduce overhead from reading CPU
id, each arena tracks the thread accessed most recently. When a new
thread comes in, we will read CPU id and update arena if necessary.
2017-02-03 09:02:05 +08:00
|
|
|
gen_mallctl_str(cmd, "nfills", arena_ind);
|
|
|
|
|
assert_d_eq(mallctl(cmd, (void *)&nfills, &sz, NULL, 0),
|
|
|
|
|
config_tcache ? expected : ENOENT, "Unexpected mallctl() result");
|
|
|
|
|
gen_mallctl_str(cmd, "nflushes", arena_ind);
|
|
|
|
|
assert_d_eq(mallctl(cmd, (void *)&nflushes, &sz, NULL, 0),
|
|
|
|
|
config_tcache ? expected : ENOENT, "Unexpected mallctl() result");
|
|
|
|
|
|
|
|
|
|
gen_mallctl_str(cmd, "nslabs", arena_ind);
|
|
|
|
|
assert_d_eq(mallctl(cmd, (void *)&nslabs, &sz, NULL, 0), expected,
|
2013-12-21 07:47:16 +08:00
|
|
|
"Unexpected mallctl() result");
|
Implement per-CPU arena.
The new feature, opt.percpu_arena, determines thread-arena association
dynamically based CPU id. Three modes are supported: "percpu", "phycpu"
and disabled.
"percpu" uses the current core id (with help from sched_getcpu())
directly as the arena index, while "phycpu" will assign threads on the
same physical CPU to the same arena. In other words, "percpu" means # of
arenas == # of CPUs, while "phycpu" has # of arenas == 1/2 * (# of
CPUs). Note that no runtime check on whether hyper threading is enabled
is added yet.
When enabled, threads will be migrated between arenas when a CPU change
is detected. In the current design, to reduce overhead from reading CPU
id, each arena tracks the thread accessed most recently. When a new
thread comes in, we will read CPU id and update arena if necessary.
2017-02-03 09:02:05 +08:00
|
|
|
gen_mallctl_str(cmd, "nreslabs", arena_ind);
|
|
|
|
|
assert_d_eq(mallctl(cmd, (void *)&nreslabs, &sz, NULL, 0), expected,
|
2013-12-21 07:47:16 +08:00
|
|
|
"Unexpected mallctl() result");
|
2014-01-29 09:22:06 +08:00
|
|
|
sz = sizeof(size_t);
|
Implement per-CPU arena.
The new feature, opt.percpu_arena, determines thread-arena association
dynamically based CPU id. Three modes are supported: "percpu", "phycpu"
and disabled.
"percpu" uses the current core id (with help from sched_getcpu())
directly as the arena index, while "phycpu" will assign threads on the
same physical CPU to the same arena. In other words, "percpu" means # of
arenas == # of CPUs, while "phycpu" has # of arenas == 1/2 * (# of
CPUs). Note that no runtime check on whether hyper threading is enabled
is added yet.
When enabled, threads will be migrated between arenas when a CPU change
is detected. In the current design, to reduce overhead from reading CPU
id, each arena tracks the thread accessed most recently. When a new
thread comes in, we will read CPU id and update arena if necessary.
2017-02-03 09:02:05 +08:00
|
|
|
gen_mallctl_str(cmd, "curslabs", arena_ind);
|
|
|
|
|
assert_d_eq(mallctl(cmd, (void *)&curslabs, &sz, NULL, 0), expected,
|
|
|
|
|
"Unexpected mallctl() result");
|
2013-12-21 07:47:16 +08:00
|
|
|
|
|
|
|
|
if (config_stats) {
|
|
|
|
|
assert_u64_gt(nmalloc, 0,
|
2014-01-22 06:20:29 +08:00
|
|
|
"nmalloc should be greater than zero");
|
2013-12-21 07:47:16 +08:00
|
|
|
assert_u64_ge(nmalloc, ndalloc,
|
|
|
|
|
"nmalloc should be at least as large as ndalloc");
|
|
|
|
|
assert_u64_gt(nrequests, 0,
|
2014-01-22 06:20:29 +08:00
|
|
|
"nrequests should be greater than zero");
|
2014-10-13 13:53:59 +08:00
|
|
|
assert_zu_gt(curregs, 0,
|
|
|
|
|
"allocated should be greater than zero");
|
2013-12-21 07:47:16 +08:00
|
|
|
if (config_tcache) {
|
|
|
|
|
assert_u64_gt(nfills, 0,
|
2014-01-22 06:20:29 +08:00
|
|
|
"At least one fill should have occurred");
|
2013-12-21 07:47:16 +08:00
|
|
|
assert_u64_gt(nflushes, 0,
|
2014-01-22 06:20:29 +08:00
|
|
|
"At least one flush should have occurred");
|
2013-12-21 07:47:16 +08:00
|
|
|
}
|
2016-05-30 09:34:50 +08:00
|
|
|
assert_u64_gt(nslabs, 0,
|
|
|
|
|
"At least one slab should have been allocated");
|
|
|
|
|
assert_zu_gt(curslabs, 0,
|
|
|
|
|
"At least one slab should be currently allocated");
|
2013-12-21 07:47:16 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
dallocx(p, 0);
|
|
|
|
|
}
|
|
|
|
|
TEST_END
|
|
|
|
|
|
2017-01-16 08:56:30 +08:00
|
|
|
TEST_BEGIN(test_stats_arenas_lextents) {
|
2014-10-13 13:53:59 +08:00
|
|
|
void *p;
|
|
|
|
|
uint64_t epoch, nmalloc, ndalloc;
|
2016-06-01 05:50:21 +08:00
|
|
|
size_t curlextents, sz, hsize;
|
2014-10-13 13:53:59 +08:00
|
|
|
int expected = config_stats ? 0 : ENOENT;
|
|
|
|
|
|
2016-05-28 15:17:28 +08:00
|
|
|
sz = sizeof(size_t);
|
2016-10-28 12:31:25 +08:00
|
|
|
assert_d_eq(mallctl("arenas.lextent.0.size", (void *)&hsize, &sz, NULL,
|
|
|
|
|
0), 0, "Unexpected mallctl() failure");
|
2016-05-28 15:17:28 +08:00
|
|
|
|
Implement per-CPU arena.
The new feature, opt.percpu_arena, determines thread-arena association
dynamically based CPU id. Three modes are supported: "percpu", "phycpu"
and disabled.
"percpu" uses the current core id (with help from sched_getcpu())
directly as the arena index, while "phycpu" will assign threads on the
same physical CPU to the same arena. In other words, "percpu" means # of
arenas == # of CPUs, while "phycpu" has # of arenas == 1/2 * (# of
CPUs). Note that no runtime check on whether hyper threading is enabled
is added yet.
When enabled, threads will be migrated between arenas when a CPU change
is detected. In the current design, to reduce overhead from reading CPU
id, each arena tracks the thread accessed most recently. When a new
thread comes in, we will read CPU id and update arena if necessary.
2017-02-03 09:02:05 +08:00
|
|
|
p = mallocx(hsize, MALLOCX_ARENA(0));
|
2014-10-13 13:53:59 +08:00
|
|
|
assert_ptr_not_null(p, "Unexpected mallocx() failure");
|
|
|
|
|
|
2016-10-28 12:31:25 +08:00
|
|
|
assert_d_eq(mallctl("epoch", NULL, NULL, (void *)&epoch, sizeof(epoch)),
|
|
|
|
|
0, "Unexpected mallctl() failure");
|
2014-10-13 13:53:59 +08:00
|
|
|
|
|
|
|
|
sz = sizeof(uint64_t);
|
2016-10-28 12:31:25 +08:00
|
|
|
assert_d_eq(mallctl("stats.arenas.0.lextents.0.nmalloc",
|
|
|
|
|
(void *)&nmalloc, &sz, NULL, 0), expected,
|
|
|
|
|
"Unexpected mallctl() result");
|
|
|
|
|
assert_d_eq(mallctl("stats.arenas.0.lextents.0.ndalloc",
|
|
|
|
|
(void *)&ndalloc, &sz, NULL, 0), expected,
|
|
|
|
|
"Unexpected mallctl() result");
|
2014-10-13 13:53:59 +08:00
|
|
|
sz = sizeof(size_t);
|
2016-06-01 05:50:21 +08:00
|
|
|
assert_d_eq(mallctl("stats.arenas.0.lextents.0.curlextents",
|
2016-10-28 12:31:25 +08:00
|
|
|
(void *)&curlextents, &sz, NULL, 0), expected,
|
|
|
|
|
"Unexpected mallctl() result");
|
2014-10-13 13:53:59 +08:00
|
|
|
|
|
|
|
|
if (config_stats) {
|
|
|
|
|
assert_u64_gt(nmalloc, 0,
|
|
|
|
|
"nmalloc should be greater than zero");
|
|
|
|
|
assert_u64_ge(nmalloc, ndalloc,
|
|
|
|
|
"nmalloc should be at least as large as ndalloc");
|
2016-06-01 05:50:21 +08:00
|
|
|
assert_u64_gt(curlextents, 0,
|
2016-10-13 02:49:19 +08:00
|
|
|
"At least one extent should be currently allocated");
|
2014-10-13 13:53:59 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
dallocx(p, 0);
|
|
|
|
|
}
|
|
|
|
|
TEST_END
|
|
|
|
|
|
2013-12-21 07:47:16 +08:00
|
|
|
int
|
2017-01-16 08:56:30 +08:00
|
|
|
main(void) {
|
2017-01-20 10:15:45 +08:00
|
|
|
return test(
|
2013-12-21 07:47:16 +08:00
|
|
|
test_stats_summary,
|
2016-06-01 05:50:21 +08:00
|
|
|
test_stats_large,
|
2013-12-21 07:47:16 +08:00
|
|
|
test_stats_arenas_summary,
|
|
|
|
|
test_stats_arenas_small,
|
2016-06-01 05:50:21 +08:00
|
|
|
test_stats_arenas_large,
|
2013-12-21 07:47:16 +08:00
|
|
|
test_stats_arenas_bins,
|
2017-01-20 10:15:45 +08:00
|
|
|
test_stats_arenas_lextents);
|
2013-12-21 07:47:16 +08:00
|
|
|
}
|
