Optimize cache_bin_alloc_easy for malloc fast path
`tcache_bin_info` is not accessed on malloc fast path but the compiler reserves a register for it, as well as an additional register for `tcache_bin_info[ind].stack_size`. The optimization gets rid of the need for the two registers.
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@ -183,8 +183,11 @@ cache_bin_array_descriptor_init(cache_bin_array_descriptor_t *descriptor,
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descriptor->bins_large = bins_large;
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}
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#define INVALID_SZIND ((szind_t)(unsigned)-1)
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JEMALLOC_ALWAYS_INLINE void *
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cache_bin_alloc_easy(cache_bin_t *bin, bool *success, szind_t ind) {
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cache_bin_alloc_easy_impl(cache_bin_t *bin, bool *success, szind_t ind,
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const bool adjust_low_water) {
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/*
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* This may read from the empty position; however the loaded value won't
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* be used. It's safe because the stack has one more slot reserved.
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@ -192,20 +195,30 @@ cache_bin_alloc_easy(cache_bin_t *bin, bool *success, szind_t ind) {
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void *ret = *(bin->cur_ptr.ptr++);
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/*
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* Check for both bin->ncached == 0 and ncached < low_water in a single
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* branch. This also avoids accessing tcache_bin_info (which is on a
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* separate cacheline / page) in the common case.
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* branch. When adjust_low_water is true, this also avoids accessing
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* tcache_bin_info (which is on a separate cacheline / page) in the
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* common case.
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*/
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if (unlikely(bin->cur_ptr.lowbits > bin->low_water_position)) {
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uint32_t empty_position = bin->full_position +
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tcache_bin_info[ind].stack_size;
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if (unlikely(bin->cur_ptr.lowbits > empty_position)) {
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/* Over-allocated; revert. */
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if (adjust_low_water) {
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assert(ind != INVALID_SZIND);
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uint32_t empty_position = bin->full_position +
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tcache_bin_info[ind].stack_size;
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if (unlikely(bin->cur_ptr.lowbits > empty_position)) {
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/* Over-allocated; revert. */
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bin->cur_ptr.ptr--;
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assert(bin->cur_ptr.lowbits == empty_position);
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*success = false;
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return NULL;
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}
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bin->low_water_position = bin->cur_ptr.lowbits;
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} else {
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assert(ind == INVALID_SZIND);
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bin->cur_ptr.ptr--;
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assert(bin->cur_ptr.lowbits == empty_position);
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assert(bin->cur_ptr.lowbits == bin->low_water_position);
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*success = false;
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return NULL;
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}
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bin->low_water_position = bin->cur_ptr.lowbits;
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}
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/*
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@ -220,6 +233,19 @@ cache_bin_alloc_easy(cache_bin_t *bin, bool *success, szind_t ind) {
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return ret;
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}
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JEMALLOC_ALWAYS_INLINE void *
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cache_bin_alloc_easy_reduced(cache_bin_t *bin, bool *success) {
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/* The szind parameter won't be used. */
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return cache_bin_alloc_easy_impl(bin, success, INVALID_SZIND, false);
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}
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JEMALLOC_ALWAYS_INLINE void *
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cache_bin_alloc_easy(cache_bin_t *bin, bool *success, szind_t ind) {
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return cache_bin_alloc_easy_impl(bin, success, ind, true);
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}
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#undef INVALID_SZIND
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JEMALLOC_ALWAYS_INLINE bool
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cache_bin_dalloc_easy(cache_bin_t *bin, void *ptr) {
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if (unlikely(bin->cur_ptr.lowbits == bin->full_position)) {
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@ -2372,7 +2372,7 @@ je_malloc(size_t size) {
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cache_bin_t *bin = tcache_small_bin_get(tcache, ind);
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bool tcache_success;
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void *ret = cache_bin_alloc_easy(bin, &tcache_success, ind);
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void *ret = cache_bin_alloc_easy_reduced(bin, &tcache_success);
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if (tcache_success) {
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*tsd_thread_allocatedp_get(tsd) += usize;
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