Improve rtree cache with a two-level cache design.
Two levels of rcache is implemented: a direct mapped cache as L1, combined with a LRU cache as L2. The L1 cache offers low cost on cache hit, but could suffer collision under circumstances. This is complemented by the L2 LRU cache, which is slower on cache access (overhead from linear search + reordering), but solves collison of L1 rather well.
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@@ -55,7 +55,10 @@ struct rtree_ctx_cache_elm_s {
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};
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struct rtree_ctx_s {
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/* Direct mapped cache. */
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rtree_ctx_cache_elm_t cache[RTREE_CTX_NCACHE];
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/* L2 LRU cache. */
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rtree_ctx_cache_elm_t l2_cache[RTREE_CTX_NCACHE_L2];
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};
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struct rtree_s {
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