Implement atomic operations for x86/x64.
Add inline assembly implementations of atomic_{add,sub}_uint{32,64}() for x86/x64, in order to support compilers that are missing the relevant gcc intrinsics.
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@ -40,6 +40,7 @@ uint32_t atomic_sub_uint32(uint32_t *p, uint32_t x);
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#endif
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#if (defined(JEMALLOC_ENABLE_INLINE) || defined(JEMALLOC_ATOMIC_C_))
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/******************************************************************************/
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/* 64-bit operations. */
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#ifdef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_8
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JEMALLOC_INLINE uint64_t
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@ -69,12 +70,40 @@ atomic_sub_uint64(uint64_t *p, uint64_t x)
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return (OSAtomicAdd64(-((int64_t)x), (int64_t *)p));
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}
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#elif (defined(__amd64_) || defined(__x86_64__))
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JEMALLOC_INLINE uint64_t
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atomic_add_uint64(uint64_t *p, uint64_t x)
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{
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asm volatile (
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"lock; xaddq %0, %1;"
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: "+r" (x), "=m" (*p) /* Outputs. */
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: "m" (*p) /* Inputs. */
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);
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return (x);
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}
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JEMALLOC_INLINE uint64_t
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atomic_sub_uint64(uint64_t *p, uint64_t x)
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{
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x = (uint64_t)(-(int64_t)x);
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asm volatile (
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"lock; xaddq %0, %1;"
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: "+r" (x), "=m" (*p) /* Outputs. */
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: "m" (*p) /* Inputs. */
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);
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return (x);
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}
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#else
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# if (LG_SIZEOF_PTR == 3)
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# error "Missing implementation for 64-bit atomic operations"
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# endif
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#endif
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/******************************************************************************/
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/* 32-bit operations. */
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#ifdef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
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JEMALLOC_INLINE uint32_t
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@ -104,6 +133,33 @@ atomic_sub_uint32(uint32_t *p, uint32_t x)
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return (OSAtomicAdd32(-((int32_t)x), (int32_t *)p));
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}
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#elif (defined(__i386__) || defined(__amd64_) || defined(__x86_64__))
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JEMALLOC_INLINE uint32_t
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atomic_add_uint32(uint32_t *p, uint32_t x)
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{
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asm volatile (
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"lock; xaddl %0, %1;"
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: "+r" (x), "=m" (*p) /* Outputs. */
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: "m" (*p) /* Inputs. */
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);
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return (x);
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}
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JEMALLOC_INLINE uint32_t
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atomic_sub_uint32(uint32_t *p, uint32_t x)
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{
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x = (uint32_t)(-(int32_t)x);
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asm volatile (
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"lock; xaddl %0, %1;"
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: "+r" (x), "=m" (*p) /* Outputs. */
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: "m" (*p) /* Inputs. */
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);
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return (x);
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}
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#else
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# error "Missing implementation for 32-bit atomic operations"
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#endif
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