Tcache fluhing: increase cache miss parallelism.
In practice, many rtree_leaf_elm accesses are cache misses. By restructuring, we can make it more likely that these misses occur without blocking us from starting later lookups, taking more of those misses in parallel.
This commit is contained in:
committed by
David Goldblatt
parent
181ba7fd4d
commit
9f9247a62e
12
src/tcache.c
12
src/tcache.c
@@ -251,7 +251,7 @@ tcache_bin_flush_metadata_visitor(void *szind_sum_ctx,
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static void
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tcache_bin_flush_edatas_lookup(tsd_t *tsd, cache_bin_ptr_array_t *arr,
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szind_t binind, size_t nflush, edata_t **edatas) {
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szind_t binind, size_t nflush, emap_batch_lookup_result_t *edatas) {
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/*
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* This gets compiled away when config_opt_safety_checks is false.
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@@ -305,7 +305,7 @@ tcache_bin_flush_impl(tsd_t *tsd, tcache_t *tcache, cache_bin_t *cache_bin,
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* Variable length array must have > 0 length; the last element is never
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* touched (it's just included to satisfy the no-zero-length rule).
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*/
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VARIABLE_ARRAY(edata_t *, item_edata, nflush + 1);
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VARIABLE_ARRAY(emap_batch_lookup_result_t, item_edata, nflush + 1);
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CACHE_BIN_PTR_ARRAY_DECLARE(ptrs, nflush);
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cache_bin_init_ptr_array_for_flush(cache_bin, &tcache_bin_info[binind],
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@@ -329,7 +329,7 @@ tcache_bin_flush_impl(tsd_t *tsd, tcache_t *tcache, cache_bin_t *cache_bin,
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bool merged_stats = false;
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while (nflush > 0) {
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/* Lock the arena, or bin, associated with the first object. */
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edata_t *edata = item_edata[0];
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edata_t *edata = item_edata[0].edata;
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unsigned cur_arena_ind = edata_arena_ind_get(edata);
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arena_t *cur_arena = arena_get(tsdn, cur_arena_ind, false);
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@@ -382,7 +382,7 @@ tcache_bin_flush_impl(tsd_t *tsd, tcache_t *tcache, cache_bin_t *cache_bin,
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if (!small) {
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for (unsigned i = 0; i < nflush; i++) {
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void *ptr = cache_bin_ptr_array_get(&ptrs, i);
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edata = item_edata[i];
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edata = item_edata[i].edata;
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assert(ptr != NULL && edata != NULL);
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if (tcache_bin_flush_match(edata, cur_arena_ind,
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@@ -400,7 +400,7 @@ tcache_bin_flush_impl(tsd_t *tsd, tcache_t *tcache, cache_bin_t *cache_bin,
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unsigned ndeferred = 0;
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for (unsigned i = 0; i < nflush; i++) {
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void *ptr = cache_bin_ptr_array_get(&ptrs, i);
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edata = item_edata[i];
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edata = item_edata[i].edata;
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assert(ptr != NULL && edata != NULL);
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if (!tcache_bin_flush_match(edata, cur_arena_ind,
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cur_binshard, small)) {
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@@ -411,7 +411,7 @@ tcache_bin_flush_impl(tsd_t *tsd, tcache_t *tcache, cache_bin_t *cache_bin,
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* it can be handled in a future pass.
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*/
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cache_bin_ptr_array_set(&ptrs, ndeferred, ptr);
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item_edata[ndeferred] = edata;
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item_edata[ndeferred].edata = edata;
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ndeferred++;
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continue;
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}
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