Output 4 counters for bin mutexes instead of just 2.

This commit is contained in:
Qi Wang 2017-04-18 15:00:14 -07:00 committed by Qi Wang
parent da4cff0279
commit acf4c8ae33

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@ -126,19 +126,21 @@ stats_arena_bins_print(void (*write_cb)(void *, const char *), void *cbopaque,
malloc_cprintf(write_cb, cbopaque, malloc_cprintf(write_cb, cbopaque,
"\t\t\t\t\"bins\": [\n"); "\t\t\t\t\"bins\": [\n");
} else { } else {
char *mutex_counters = " n_lock_ops n_waiting"
" n_spin_acq max_wait_ns\n";
if (config_tcache) { if (config_tcache) {
malloc_cprintf(write_cb, cbopaque, malloc_cprintf(write_cb, cbopaque,
"bins: size ind allocated nmalloc" "bins: size ind allocated nmalloc"
" ndalloc nrequests curregs" " ndalloc nrequests curregs"
" curslabs regs pgs util nfills" " curslabs regs pgs util nfills"
" nflushes newslabs reslabs" " nflushes newslabs reslabs%s",
" contention max_wait_ns\n"); mutex ? mutex_counters : "\n");
} else { } else {
malloc_cprintf(write_cb, cbopaque, malloc_cprintf(write_cb, cbopaque,
"bins: size ind allocated nmalloc" "bins: size ind allocated nmalloc"
" ndalloc nrequests curregs" " ndalloc nrequests curregs"
" curslabs regs pgs util newslabs" " curslabs regs pgs util newslabs"
" reslabs contention max_wait_ns\n"); " reslabs%s", mutex ? mutex_counters : "\n");
} }
} }
for (j = 0, in_gap = false; j < nbins; j++) { for (j = 0, in_gap = false; j < nbins; j++) {
@ -245,6 +247,10 @@ stats_arena_bins_print(void (*write_cb)(void *, const char *), void *cbopaque,
&max_wait, uint64_t); &max_wait, uint64_t);
CTL_M2_M4_GET("stats.arenas.0.bins.0.mutex.num_ops", CTL_M2_M4_GET("stats.arenas.0.bins.0.mutex.num_ops",
i, j, &num_ops, uint64_t); i, j, &num_ops, uint64_t);
uint64_t mutex_stats[num_mutex_prof_counters];
if (mutex) {
read_arena_bin_mutex_stats(i, j, mutex_stats);
}
char rate[6]; char rate[6];
if (get_rate_str(num_wait, num_ops, rate)) { if (get_rate_str(num_wait, num_ops, rate)) {
@ -259,22 +265,32 @@ stats_arena_bins_print(void (*write_cb)(void *, const char *), void *cbopaque,
"%20zu %3u %12zu %12"FMTu64 "%20zu %3u %12zu %12"FMTu64
" %12"FMTu64" %12"FMTu64" %12zu" " %12"FMTu64" %12"FMTu64" %12zu"
" %12zu %4u %3zu %-5s %12"FMTu64 " %12zu %4u %3zu %-5s %12"FMTu64
" %12"FMTu64" %12"FMTu64" %12"FMTu64 " %12"FMTu64" %12"FMTu64" %12"FMTu64,
" %12s %12"FMTu64"\n",
reg_size, j, curregs * reg_size, nmalloc, reg_size, j, curregs * reg_size, nmalloc,
ndalloc, nrequests, curregs, curslabs, ndalloc, nrequests, curregs, curslabs,
nregs, slab_size / page, util, nfills, nregs, slab_size / page, util, nfills,
nflushes, nslabs, nreslabs, rate, max_wait); nflushes, nslabs, nreslabs);
} else { } else {
malloc_cprintf(write_cb, cbopaque, malloc_cprintf(write_cb, cbopaque,
"%20zu %3u %12zu %12"FMTu64 "%20zu %3u %12zu %12"FMTu64
" %12"FMTu64" %12"FMTu64" %12zu" " %12"FMTu64" %12"FMTu64" %12zu"
" %12zu %4u %3zu %-5s %12"FMTu64 " %12zu %4u %3zu %-5s %12"FMTu64
" %12"FMTu64" %12s %12"FMTu64"\n", " %12"FMTu64,
reg_size, j, curregs * reg_size, nmalloc, reg_size, j, curregs * reg_size, nmalloc,
ndalloc, nrequests, curregs, curslabs, ndalloc, nrequests, curregs, curslabs,
nregs, slab_size / page, util, nslabs, nregs, slab_size / page, util, nslabs,
nreslabs, rate, max_wait); nreslabs);
}
if (mutex) {
malloc_cprintf(write_cb, cbopaque,
" %12"FMTu64" %12"FMTu64" %12"FMTu64
" %12"FMTu64"\n",
mutex_stats[mutex_counter_num_ops],
mutex_stats[mutex_counter_num_wait],
mutex_stats[mutex_counter_num_spin_acq],
mutex_stats[mutex_counter_max_wait_time]);
} else {
malloc_cprintf(write_cb, cbopaque, "\n");
} }
} }
} }