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Restrict lwsync to powerpc64 only

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Nearly all 32-bit powerpc hardware treats lwsync as sync, and some cores
(Freescale e500) trap lwsync as an illegal instruction, which then gets
emulated in the kernel.  To avoid unnecessary traps on the e500, use
sync on all 32-bit powerpc.  This pessimizes 32-bit software running on
64-bit hardware, but those numbers should be slim.
This commit is contained in:
Justin Hibbits 2018-10-23 16:41:14 -05:00 committed by David Goldblatt
parent ceba1dde27
commit be0749f591
1 changed files with 3 additions and 1 deletions
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4
include/jemalloc/internal/atomic_gcc_sync.h
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@ -27,8 +27,10 @@ atomic_fence(atomic_memory_order_t mo) {
asm volatile("" ::: "memory"); asm volatile("" ::: "memory");
# if defined(__i386__) || defined(__x86_64__) # if defined(__i386__) || defined(__x86_64__)
/* This is implicit on x86. */ /* This is implicit on x86. */
# elif defined(__ppc__) # elif defined(__ppc64__)
asm volatile("lwsync"); asm volatile("lwsync");
# elif defined(__ppc__)
asm volatile("sync");
# elif defined(__sparc__) && defined(__arch64__) # elif defined(__sparc__) && defined(__arch64__)
if (mo == atomic_memory_order_acquire) { if (mo == atomic_memory_order_acquire) {
asm volatile("membar #LoadLoad | #LoadStore"); asm volatile("membar #LoadLoad | #LoadStore");