3c9c41edb2
Two levels of rcache is implemented: a direct mapped cache as L1, combined with a LRU cache as L2. The L1 cache offers low cost on cache hit, but could suffer collision under circumstances. This is complemented by the L2 LRU cache, which is slower on cache access (overhead from linear search + reordering), but solves collison of L1 rather well.
75 lines
1.7 KiB
C
75 lines
1.7 KiB
C
#ifndef JEMALLOC_INTERNAL_RTREE_STRUCTS_H
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#define JEMALLOC_INTERNAL_RTREE_STRUCTS_H
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#include "jemalloc/internal/atomic.h"
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struct rtree_node_elm_s {
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atomic_p_t child; /* (rtree_{node,leaf}_elm_t *) */
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};
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struct rtree_leaf_elm_s {
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#ifdef RTREE_LEAF_COMPACT
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/*
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* Single pointer-width field containing all three leaf element fields.
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* For example, on a 64-bit x64 system with 48 significant virtual
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* memory address bits, the index, extent, and slab fields are packed as
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* such:
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*
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* x: index
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* e: extent
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* b: slab
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* k: lock
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*
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* 00000000 xxxxxxxx eeeeeeee [...] eeeeeeee eeee00bk
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*/
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atomic_p_t le_bits;
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#else
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atomic_p_t le_extent; /* (extent_t *), lock in low bit */
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atomic_u_t le_szind; /* (szind_t) */
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atomic_b_t le_slab; /* (bool) */
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#endif
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};
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struct rtree_leaf_elm_witness_s {
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const rtree_leaf_elm_t *elm;
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witness_t witness;
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};
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struct rtree_leaf_elm_witness_tsd_s {
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rtree_leaf_elm_witness_t witnesses[RTREE_ELM_ACQUIRE_MAX];
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};
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struct rtree_level_s {
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/* Number of key bits distinguished by this level. */
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unsigned bits;
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/*
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* Cumulative number of key bits distinguished by traversing to
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* corresponding tree level.
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*/
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unsigned cumbits;
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};
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struct rtree_ctx_cache_elm_s {
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uintptr_t leafkey;
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rtree_leaf_elm_t *leaf;
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};
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struct rtree_ctx_s {
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/* Direct mapped cache. */
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rtree_ctx_cache_elm_t cache[RTREE_CTX_NCACHE];
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/* L2 LRU cache. */
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rtree_ctx_cache_elm_t l2_cache[RTREE_CTX_NCACHE_L2];
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};
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struct rtree_s {
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malloc_mutex_t init_lock;
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/* Number of elements based on rtree_levels[0].bits. */
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#if RTREE_HEIGHT > 1
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rtree_node_elm_t root[1U << (RTREE_NSB/RTREE_HEIGHT)];
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#else
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rtree_leaf_elm_t root[1U << (RTREE_NSB/RTREE_HEIGHT)];
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#endif
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};
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#endif /* JEMALLOC_INTERNAL_RTREE_STRUCTS_H */
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