project-base/server-skynet-source-3rd-jemalloc
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Use the isb instruction instead of yield for spin locks on arm

Browse Source 
isb introduces a small delay which is closer to the x86 pause instruction.
This commit is contained in:
Jonathan Swinney 2022-01-06 17:09:34 +00:00 committed by Qi Wang
parent 6230cc88b6
commit 89fe8ee6bf
1 changed files with 8 additions and 7 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

15
configure.ac
View File

@ -425,14 +425,15 @@ case "${host_cpu}" in
;; ;;
aarch64|arm*) aarch64|arm*)
HAVE_CPU_SPINWAIT=1 HAVE_CPU_SPINWAIT=1
AC_CACHE_VAL([je_cv_yield], dnl isb is a better equivalent to the pause instruction on x86.
[JE_COMPILABLE([yield instruction], [], AC_CACHE_VAL([je_cv_isb],
[[__asm__ volatile("yield"); return 0;]], [JE_COMPILABLE([isb instruction], [],
[je_cv_yield])]) [[__asm__ volatile("isb"); return 0;]],
if test "x${je_cv_yield}" = "xyes" ; then [je_cv_isb])])
CPU_SPINWAIT='__asm__ volatile("yield")' if test "x${je_cv_isb}" = "xyes" ; then
CPU_SPINWAIT='__asm__ volatile("isb")'
fi fi
;; ;;
*) *)
HAVE_CPU_SPINWAIT=0 HAVE_CPU_SPINWAIT=0
;; ;;