Use the isb instruction instead of yield for spin locks on arm

isb introduces a small delay which is closer to the x86 pause instruction.
This commit is contained in:
Jonathan Swinney 2022-01-06 17:09:34 +00:00 committed by Qi Wang
parent 6230cc88b6
commit 89fe8ee6bf

View File

@ -425,12 +425,13 @@ case "${host_cpu}" in
;;
aarch64|arm*)
HAVE_CPU_SPINWAIT=1
AC_CACHE_VAL([je_cv_yield],
[JE_COMPILABLE([yield instruction], [],
[[__asm__ volatile("yield"); return 0;]],
[je_cv_yield])])
if test "x${je_cv_yield}" = "xyes" ; then
CPU_SPINWAIT='__asm__ volatile("yield")'
dnl isb is a better equivalent to the pause instruction on x86.
AC_CACHE_VAL([je_cv_isb],
[JE_COMPILABLE([isb instruction], [],
[[__asm__ volatile("isb"); return 0;]],
[je_cv_isb])])
if test "x${je_cv_isb}" = "xyes" ; then
CPU_SPINWAIT='__asm__ volatile("isb")'
fi
;;
*)